With the advancements in semiconductor device technology, several different types of package arrangements for integrated circuit devices have emerged. One type of arrangement to have emerged is the fine ball grid array (FBGA) device. An example of a typical FBGA device is illustrated in FIG. 1 by a partial cross-sectional diagram.
As shown in FIG. 1, an FBGA device 8 typically includes an integrated circuit die 10 encapsulated in packaging material 12, e.g., an epoxy compound. Electrical connections for the die 10 are provided by bond wires 14, such as gold wires, coupling input/output pads on the die 10 to bond pads 16 of a die paddle 18, e.g., an elastomer material. The bond pads 16 couple the die 10 to solder ball connectors 20 via electrical connector tracings 22, e.g., copper tracings, in a tape material 24, e.g., a polyimide tape. The solder ball connectors 20 may then be used to capably attach the device 8 to a circuit board (not shown).
In order to perform device analysis, normally the package 12 must be removed to reveal the surface of die 10 and bond wires 14. Chemical etching is commonly performed to remove the package 12. Unfortunately, a difficulty exists in precisely controlling the chemical etching, since the etching of the package 12 typically results in overetching of the package 12. The overetching often damages the bond wires 14, which destroys the ability to electrically test the circuit. Further, without sufficient package material on an edge portion of the device, the device cannot be adequately secured in a testing socket and device analysis is unable to be performed.
Accordingly, a need exists for a package removal procedure for an FBGA device to allow successful device analysis. The present invention addresses such a need.